The present invention relates to the fabrication of integrated circuit devices, and more particularly, to a semiconductor method of forming container cells, vias and other openings having a specifically desired etch profile.
The method for forming a target etch profile according to the present invention has special applicability to the formation of container cells for semiconductor capacitors but is not limited thereto. Capacitors in the form of container cells are used in a wide variety of semiconductor circuits. Capacitors are of special importance in DRAM (dynamic random access memory) memory circuits; therefore, the invention will be particularly discussed in connection with DRAM memory circuits. However, the invention has broader applicability and is not limited to DRAM memory circuits. It may be used in other types of memory circuits, such as SRAMs, as well as any other integrated circuit in which capacitors are used, or in which maximizing the volume of etched cells within a given cell area is desired, or in which there is a need for a semiconductor via or other cavity having a target etch profile.
Known container capacitors are in the shape of an upstanding tube (cylinder) with an oval or circular cross section. The wall of the tube consists of two plates of conductive material such as doped polycrystalline silicon (referred to herein as polysilicon or poly) separated by a dielectric. The bottom end of the tube is closed, with the outer wall in contact with either the drain of the access transistor or a plug which itself is in contact with the drain. The other end of the tube is open. The sidewall and closed end of the tube form a container; hence the name xe2x80x9ccontainer capacitor.xe2x80x9d
FIG. 2 illustrates a step in the formation of a container capacitor in which the container cell area 144 is prepared for the deposition and etching of an Interlevel Dielectric Material (IDM). Following the deposition and etching of the IDM layer, a conductive layer is then deposited within the container cell. The surface area of this conductive material determines the capacitance of the capacitor and is dependent on the volume of the container cell. The volume of the container cell in turn is dependent upon the successful etching of the IDM layer.
In constructing a container cell, the IDM layer is typically composed of borophosphosilicate glass (BPSG); phosphosilicate glass (PSG), silicon dioxide, or the like. When the etchant is applied, the amount of etching performed is dependent upon the etch rate and the length of time the etchant is applied. The direction of the etch is determined by the degree to which the selected etching process is isotropic or anisotropic. Etching which proceeds in all directions at the same rate is said to be xe2x80x9cisotropicxe2x80x9d. By definition, any etching that is not isotropic is anisotropic. Wet etching, for example, is isotropic. Many etching processes typically fall between the extremes of being isotropic and completely anisotropic and, therefore, some unwanted etching is common even under the best conditions of prior etching processes.
Ideally, the process used to etch the IDM layer would be completely anisotropic, as this would produce a completely vertical container wall. However, as the etching of the IDM layer occurs at least somewhat isotropically, some unwanted etching in the horizontal direction occurs. In other words, as etching processes are applied for a length of time to etch in a downward direction for a required depth, etching also occurs in an outward direction. This typically causes a widening or bowing out at the top of the etched container cell. The isotropic component of the etch process is a function of the etch conditions, the etch rate, and the characteristics of the material being etched.
As illustrated in FIG. 1a, the resulting shape of the container cell is one in which the sidewalls 150 are sloped and hence the volume of the container is not maximized. This results in less room for conductive material and lower capacitance for the container capacitor. FIG. 1b illustrates an ideal container cell in which the side walls 152 are vertical and hence the container volume is maximized.
FIG. 1c illustrates an overlapping comparison of the sloping wall 150 container versus the straight wall 152 container. The lost volume 160 caused by the sloping of the walls decreases the surface area of the container capacitor and thus the capacitance of the resulting capacitor.
As memory cell density continues to increase, efficient use of space becomes ever more important. Therefore, what is needed is an etching process and container capacitor that make more efficient use of available memory cell space.
Further, as the trend of scaling down and the need for fabricating extremely precise submicron components continue, it is becoming increasingly important to provide techniques for fabricating substantially straight vertical sidewalls and various other precise target etch profiles.
The present invention provides a method of compensating for the unwanted etch characteristics of any desired etching process in order to achieve precise, submicron target etch profiles.
The present invention also provides a method and resultant structure which increases the capacitance of container capacitors without increasing their stack height.
An etching process may be made xe2x80x9cselectivexe2x80x9d to one surface over another based upon a variety of characteristics of the material being etched. These characteristics are termed xe2x80x9cetch rate varying characteristicsxe2x80x9d and include, but are not limited to, dopant levels, density, deposition temperature, and deposition pressure. By making an etching process or etchant xe2x80x9cselectivexe2x80x9d to a particular surface or composition, the process or etchant will etch that particular surface or composition less rapidly than the surrounding surface or other material with which the etchant may come into contact. Accordingly, where an etchant is selective for a heavily doped material such as heavily boron doped BPSG, the etchant will etch layers of material containing heavily boron doped BPSG less quickly than other layers not similarly composed.
According to one aspect of the present invention, a two step etch is applied to a layer of material having an upper composition and a lower composition. To this layer of material, a first etch process is applied which is selective for the lower composition such that it keeps a relatively more vertical profile in the upper composition and slows down when it reaches the lower composition. A second etch process is then applied which has a high selectivity to the upper composition, so that it will etch the upper composition relatively less rapidly and thus have a low isotropic component for the upper composition. The second etch process also preferably has sufficient selectivity to the layer beneath the lower composition (usually nitride) so as not to damage the underlying layer.
In this two step etch embodiment, the selectivities of the etch for the upper and lower compositions may be varied by changing the etch process itself, or by varying the compositions of the upper and lower layers, or by a combination of both of these factors. According to a preferred 2-layer embodiment of the present invention, the upper IDM layer is a lightly doped BPSG or phosphosilicate glass (PSG) layer and the lower IDM layer is a highly doped BPSG or phosphosilicate glass (PSG) layer.
According to another preferred embodiment, the upper layer is high density plasma phosphosilicate glass (HDP PSG) with low dopant levels and is deposited at high temperature, and the lower layer is HDP PSG with high dopant levels and is deposited at low temperature.
According to another aspect of the invention, a single IDM layer having graded, target dopant levels is used in conjunction with a two step etching process. In accordance with this aspect of the invention, the first etch is selective to the lower composition of the IDM layer. The second etch is selective to the upper composition of the IDM layer and thus has a low isotropic component for etching the upper composition. According to a preferred embodiment, the IDM layer as initially deposited is doped with 1% boron and 2% phosphorous, and these dopant levels are increased in a continuous manner to 4% boron, 7% phosphorous as the IDM layer is deposited.
In yet another aspect, a wet etch solution is applied after the container hole or other feature is etched with a dry etch process. The purpose of the wet etch is to alter, for example, straighten out, the container sidewall after the dry etch. The dopant profile is adjusted so as to result in a maximum wet etch rate at the location where the container diameter after the dry etch is the smallest in order to produce substantially straight container sidewalls.
These preferred embodiments result in an etch profile having substantially straight vertical sidewalls. By use of the term xe2x80x9csubstantially straightxe2x80x9d herein we mean that a sidewall does not vary outside the range of plus or minus one degree of arc for any 1 micron segment of elevation of the sidewall, and more preferably does not deviate by a dimension of greater than 5% of the average width of the opening at any point along the sidewall.
By use of the term xe2x80x9ctargetxe2x80x9d dopant levels herein we mean that the dopant concentration is intentionally varied to achieve an etch characteristic which provides the desired etch profile. The etch profile may be a substantially straight vertical profile, or any other target profile that may be desired for a given application, including, for example, convex sidewalls, concave sidewalls, inward sloping or outward sloping sidewalls, and combinations of these or various other profiles at different levels of the etched opening, including for example, an hour-glass or a multiple stepped profile. The target profile may also have continuous curves, if desired, or abrupt edges, or a combination of both.
In addition, the target dopant levels or other etch rate varying characteristics may be continuously graded target dopant levels, or other continuously graded etch rate varying characteristics, so long as the target dopant level, etc., is matched to the etching process to achieve a target etch profile, as will be described in detail below.
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objects and advantages of the invention will be attained by means of instrumentalities and combinations particularly pointed out in the appended claims.